发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND THE DEVICE
摘要 PROBLEM TO BE SOLVED: To improve the manufacturing yield of wiring to be formed by a process. SOLUTION: Dummy chips DC having second groove patterns formed in the same process as first groove patterns of main body chips SC are arranged in a region, in which the main body chips SC are not formed at the peripheral part of a semiconductor wafer SW1. Thus, the surfaces of metallic films accumulated on the semiconductor wafer SW1 are polished uniformly by CMP, and the erosion phenomenon or dishing phenomenon of the metallic films to be embedded in the first groove patterns can be suppressed.
申请公布号 JP2000021882(A) 申请公布日期 2000.01.21
申请号 JP19980185810 申请日期 1998.07.01
申请人 HITACHI LTD 发明人 NOGUCHI JUNJI;YAMAGUCHI HIDE;NONAMI HIDEAKI
分类号 H01L21/302;H01L21/304;H01L21/3065;H01L21/3205;(IPC1-7):H01L21/320;H01L21/306 主分类号 H01L21/302
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