发明名称 EPROM MODE SETTING DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To easily constitute an EPROM mode setting device which is not affected by process fluctuation. SOLUTION: All the signals of XI terminal 2 and XO terminal 1 for connecting a crystal oscillator and the signal of a reset signal input terminal 3 of a microcomputer are inputted to a logic gate 25 for EPROM mode setting. When all these input signals are turned into Low level, the output of the logic gate 25 is made active and an EPROM mode setting signal is outputted. The threshold voltage of the logic gate 25 is set lower than 1/4VDD and at the time of crystal oscillating operation in microcomputer operation, even when the operating point of an inverter 4 in an oscillation circuit is deviated by the dispersion of processes, both the signals of XI terminal 2 and XO terminal 1 can be prevented from being erroneously recognized as Low level by the logic gate 25.</p>
申请公布号 JP2000020497(A) 申请公布日期 2000.01.21
申请号 JP19980182346 申请日期 1998.06.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 AIDA TOMIO
分类号 G06F15/78;(IPC1-7):G06F15/78 主分类号 G06F15/78
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