发明名称 TIME ADJUSTING METHOD FOR LOGICAL COMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To enable a guest OS to use the standard time irrelevantly to whether or not a function for referring to the standard time supplied from an external timer mechanism is available by allowing a logical computer control part to set the time on each logical computer to the standard time. SOLUTION: Information for controlling respective logical computers LPAR is prepared by the LPARs in a PRMA. The control information includes control information 3110 on a logical IP belonging to a logical computer and LPAR information 3120 as control information on the LPARs. Information on the time difference between a logical TOD and a physical TOD is stored as information by logical IPs in a time difference information storage area 3111. Then information on the time difference between the logical TOD and standard time which is generated as a result of the execution of the time correcting processing of a physical computer is added to a time difference information storage area 3111 for all logical IPs of all the LPARs. Through this processing, the guest OS is able to continue the same operation as that before time correction.</p>
申请公布号 JP2000020158(A) 申请公布日期 2000.01.21
申请号 JP19980191255 申请日期 1998.07.07
申请人 HITACHI LTD 发明人 YAMAUCHI HIROYUKI;ISHIOKA ICHIRO
分类号 G06F1/14;G06F9/46;(IPC1-7):G06F1/14 主分类号 G06F1/14
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