| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-reliability CPU device by preventing a CPU from reloading a program copied in a DRAM by itself concerning the CPU device with built-in DRAM. SOLUTION: Concerning a CPU device 10 with a built-in CPU core 11 and DRAM 12, a managing part 15 for managing the DRAM 12 is provided with a write protect circuit 16 for inhibiting write to the prescribed address of the DRAM 12. At the time of copying the program into the DRAM 12, write inhibition is canceled and after copy, the program is executed in the state of write inhibition. When a write instruction is outputted to the address of write inhibition, an interruption signal is returned to the CPU core 11. Thus, the program is prevented from being reloaded, a module, to which an illegal access is performed, is specified and program development efficiency can be improved as well. |
