发明名称 ETCHING METHOD
摘要 PROBLEM TO BE SOLVED: To provide an etching method which prevents a pattern by ensuring a remaining film after etching of resist, which becomes a mask by making a counter-resist selection ratio high. SOLUTION: A field oxide film 5 and an MOS transistor 6 are formed in a surface of a silicon board 1. A layer insulation film 7 is formed in a surface of the field oxide film 5 and a surface of the MOS transistor 6. A contact hole 8 is shaped in the layer insulation film 7, and polysilicon 9 which becomes a capacity electrode is deposited. A resist 4 is formed in a surface of the polysilicon 9. The resist 4 is subjected to patterning into a specified shape. The polysilicon 9 is etched to a specified pattern configuration, by using the resist 4 formed in this way as a mask. When the polysilicon layer 9 is etched, conditions such as Cl2: 150 sccm, HBr: 450 sccm, CHF3: 100 sccm, pressure: 100 mTorr, RF power in an upper counter electrode 15: 500 W and RF power in a lower counter electrode 13: 300 W are adopted.
申请公布号 JP2000021848(A) 申请公布日期 2000.01.21
申请号 JP19980185186 申请日期 1998.06.30
申请人 NEC CORP 发明人 MANSEI AKIRA
分类号 B65D5/20;B65D5/50;B65D5/60;H01L21/302;H01L21/306;H01L21/3065;H01L21/3213 主分类号 B65D5/20
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