摘要 |
<p>PROBLEM TO BE SOLVED: To suppress dispersion in delay time even when the absolute values of the threshold of a PMOS transistor and an NMOS transistor tend to disperse in mutually opposite directions in a RC delay circuit. SOLUTION: This circuit is composed of at least one set of delay circuits composed by serially connecting a first delay circuit 11 and a second delay circuit 12. The first delay circuit 11 is provided with a first RC circuit 110 and a first CMOS inverter circuit IV2 connected to the output side, and the second delay circuit 12 is provided with a second RC circuit 120 and a second CMOS inverter circuit IV2 connected to the output side. The transition direction of the input potential of the first CMOS inverter circuit accompanying the transition of the logic level of the input signals of the first delay circuit 11 and the transition direction of the input potential of the second CMOS inverter circuit are opposite to each other.</p> |