| 摘要 |
PROBLEM TO BE SOLVED: To eliminate necessity of setting a margin between data determination and a timing for starting a control signal by passing an input data for a plurality of latch circuit sections without any modification when a data latch control signal is input, while holding the data when the control signal is not input. SOLUTION: A first NAND gate 11 supplies as an input to a first flip-flop a signal in which a level of an input data signal irdOx is inverted when a control signal piOz is supplied, while supplying an H-level signal, irrespective of the data signal status, to the first flip-flop as its input when this control signal is not supplied. On the other hand, a second NAND gate 12 supplies as an input to a second flip-flop a signal in which a level of another input data signal irdOz is inverted when the control signal piOz is in an H-level, while supplying an H-level signal, irrespective of the data signal status, to the second flip-flop as its input when this control signal is in an L-level.
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