| 摘要 |
PROBLEM TO BE SOLVED: To improve the performance of write command processing by realizing the case of write command processing, in which a CPU is not concerned, at the time of executing a write cache function, resultingly shortening write command processing time. SOLUTION: When the result of cache discrimination due to a cache discriminating circuit 12 for a write command shows cache hit, a disk controller 8 performs processing from the start of data transfer to the end of the command only through respective circuits 10-17 composed of hardware while a CPU 5 is not concerned in. In the case of not cache hit, processing from the start of data transfer, in which a firmware including the CPU 5 is concerned, to the end of the command is executed.
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