| 摘要 |
<p>The present invention provides integrated circuit fabrication methods and devices wherein dual damascene structures are formed which compensate for misalignment between the via pattern and the trench pattern by widening the trench (238) at the point (239) where the misalignment has occured. Methods and devices are also provided wherein the trench width (326) is not affected by misalignment thus preventing electrical shorts between closely spaced interconnect lines, thus technique resulting in a reduction of the width of the via (332). Further embodiments of the present invention include the use of single layer masks, such as silicon-based photosensitive materials (418) which form a hard mask upon exposure to radiation. In additional embodiments, manufacturing systems (610) are provided for fabricating IC structures. These systems include a controller (600) which is adapted for interacting with plurality of fabrication stations (620, 622, 624, 626, 628, 630 and 632).</p> |
