| 发明名称 |
Burst synchronizing circuit |
| 摘要 |
<p>A burst synchronizing circuit synchronizes a received data signal in a burst fashion and sampling phases with which the received data signal is sampled. A first part samples a data pattern with different sampling phases. A second part selects the received data signal sampled with an optimal sampling phase based on sampling phases with which the pattern data is detected. <IMAGE></p> |
| 申请公布号 |
EP0973289(A2) |
申请公布日期 |
2000.01.19 |
| 申请号 |
EP19990113671 |
申请日期 |
1999.07.15 |
| 申请人 |
FUJITSU LIMITED |
发明人 |
HIROTA, MASAKI;KUSAYANAGI, MICHIO |
| 分类号 |
H04L25/40;H04L7/02;H04L7/033;H04L7/04;H04L7/08;H04L7/10;(IPC1-7):H04J3/06 |
主分类号 |
H04L25/40 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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