发明名称 |
Method of fabricating CMOS devices with ultra-shallow junctions and reduced drain area |
摘要 |
A method of making a semiconductor device forms a gate on a substrate and provides a self-aligned diffusion source on the substrate, without the use of a mask. The diffusion source provides dopant material into the substrate. The self-aligning of the diffusion source avoids misalignment of the mask and improper doping. When the diffusion source is polysilicon or amorphous silicon, subsequent patterning and siliciding of the polysilicon forms silicided interconnect straps available for interconnecting devices on the semiconductor wafer.
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申请公布号 |
US6015740(A) |
申请公布日期 |
2000.01.18 |
申请号 |
US19970798581 |
申请日期 |
1997.02.10 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
MILIC-STRKALJ, OGNJEN |
分类号 |
H01L21/336;H01L29/45;H01L29/78;(IPC1-7):H01L21/336;H01L21/22;H01L21/38 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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