发明名称 SYNCHRONIZATION PROCESS, PRIMARY REFERENCE CLOCK AND NETWORK ELEMENT FOR A SYNCHRONOUS DIGITAL TELECOMMUNICATIONS NETWORK
摘要 Network elements (NE1, NE2) of a synchronous digital telecommunications network are synchronized to the reference clock of a primary reference clock. To increase the fault tolerance of the network, two primary reference clocks (PRC1, PRC2) are used. In fault-free operation, the first reference clock signal is transmitted to the network elements and used for synchronization and the second reference clock signal is available as a standby reference clock signal. In case of an error, synchronization is switched to the second reference clock signal. The synchronization process according to the invention provides that, in order to differentiate the two reference clock signals, at least one of the two reference clock signals is marked by a predetermined bit sequence in the overhead of message signals (STM-N) generated by the reference clock signal or by applying a phase modulation to the reference clock signal. This ensures that the network is synchronized by a single reference clock source.
申请公布号 CA2277612(A1) 申请公布日期 2000.01.18
申请号 CA19992277612 申请日期 1999.07.16
申请人 ALCATEL 发明人 WOLF, MICHAEL
分类号 H04J3/06;H04Q11/04;(IPC1-7):H04L7/04;H04B1/74 主分类号 H04J3/06
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