| 摘要 |
A computerized method (20, 60) for optimizing chip size/aspect ratio and reticle layout. The method includes the steps of first generating an initial rectangular shot map (22, 62) having a number of rows and columns of shots, determining which chips in the initial rectangular shot map are geometrically positioned on acceptable areas of a wafer, determining which chips in the initial rectangular shot map are geometrically positioned on low and high yield locations of the wafer, and deleting the empty shots from the initial rectangular shot map for obtaining a temporary best shot map. Thereafter, iteratively shifting the initial rectangular shot map along a first axis until a first predetermined limit is reached, comparing each resultant shifted shot map with the temporary best shot map, and setting the shifted shot map as the temporary best shot map in response to a favorable comparison. After the first predetermined limit is reached, iteratively shifting the initial shot map along a second axis until a second predetermined limit is reached, comparing each resultant shifted rectangular shot map with the temporary best shot map, and setting the shifted shot map as the temporary best shot map in response to a favorable comparison. A best shot map (100, 110) is then generated for wafer fabrication. The chip size is also optimized by a companion method.
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