发明名称 Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate
摘要 The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.
申请公布号 US6015722(A) 申请公布日期 2000.01.18
申请号 US19990369800 申请日期 1999.08.06
申请人 GORE ENTERPRISE HOLDINGS, INC. 发明人 BANKS, DONALD R.;POFAHL, RONALD G.;SYLVESTER, MARK F.;PETEFISH, WILLIAM G.;FISCHER, PAUL J.
分类号 H01L21/48;H01L21/56;H01L23/14;H01L23/373;H01L23/498;(IPC1-7):H01L21/58;H01L21/60 主分类号 H01L21/48
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