发明名称 CONTROLLED COMPLIANCE POLISHING PAD
摘要 <p>The polishing pad (23, 36, 50) includes a polishing layer (52) and a rigid layer (54). The rigid layer (54) adjacent the polishing layer (52) imparts a controlled rigidity to the polishing layer (52). The resilient layer (56) adjacent the rigid layer (54) provides substantially uniform pressure to the rigid layer (54). During operation, the rigid layer (54) and the resilient layer (56) apply an elastic flexure pressure to the polishing layer (52) to induce a controlled flex in the polishing layer (52) to conform to the global topography of the wafer surface while maintaining a controlled rigidity over the local topography of the wafer surface. <IMAGE></p>
申请公布号 KR100239226(B1) 申请公布日期 2000.01.15
申请号 KR19910010889 申请日期 1991.06.28
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 PIERCE, JOHN MORLEY;RENTELN, PETER HENRY
分类号 B24D9/04;B24B37/22;B24D11/02;H01L21/304;(IPC1-7):H01L21/30 主分类号 B24D9/04
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