发明名称 |
HIGH SPEED INTERFACE APPARATUS |
摘要 |
PURPOSE: The apparatus realizes the high speed by doubling the bandwidth as maintaining bus width and system bus frequency. CONSTITUTION: The apparatus comprises: a data driving part(100) outputting 4 level data signal after decoding 2 bits data signal respectively; a reference potential generating part(200) generating a reference potential of 3 level to judge the potential level of the 4 level data signal; and a receiver part(300) outputting 2 bits data signal by encoding a signal outputted by comparing the 4 level data signal and the reference potential signal of 3 level.
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申请公布号 |
KR20000003573(A) |
申请公布日期 |
2000.01.15 |
申请号 |
KR19980024833 |
申请日期 |
1998.06.29 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD. |
发明人 |
SEO, JUNG WON |
分类号 |
G06F3/00;H01L27/04;H03M13/00;H04L25/02;H04L25/49;(IPC1-7):H01L27/04 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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