发明名称 REDUNDANT CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain a redundant circuit, in which a precharging operation can be performed surely when a redundancy is used, and in which a node potential can be pulled out at high speed. SOLUTION: A redundant circuit for a semiconductor memory device is formed in such a way that P-channel precharging transistors are connected across power supplies Vcc and a node N2, and that the node N2 is grounded by a series circuit by a plurality of fuses F1A, F1B, F2A, F2B,... and N-channel transistors T1A, T1B, T2A, T2B,... The redundant circuit is formed in such a way that a first precharging transistor TR1 in which an address transient detector signal QATB having a prescribed pulse width is inputted to its gate is provided, that a second precharging transistor TR2 in which a pulse signal QATS generated from a column address probe signal (the inverse of CAS) is inputted to its gate is provided, and that the first and second precharging transistors TR1, TR2 are formed so as to be connected in parallel with the node N2.
申请公布号 JP2000011683(A) 申请公布日期 2000.01.14
申请号 JP19980172981 申请日期 1998.06.19
申请人 SANYO ELECTRIC CO LTD 发明人 OKI TETSUO;IIJIMA SATOAKI
分类号 G11C29/04;G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/04
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