RADIO RECEIVER AND FREQUENCY DEVIATION ESTIMATING METHOD

摘要

PROBLEM TO BE SOLVED: To provide a radio receiver that reduces a frequency deviation estimation time to calculate a frequency deviation of a low speed clock with high accuracy so as to reduce the power consumption. SOLUTION: This radio receiver is provided with a high speed clock generator 1 and a low speed clock generator 8, activates the high speed clock generator for a reception period of intermittent reception and uses the low speed clock to measure an activation timing of the high speed clock generator. In this case, the receiver is provided with a multiplier means 4 that multiplies the high speed clock and with a frequency deviation estimation means 20 that estimates a frequency deviation of the low speed clock by using the multiplied high speed clock by the multiplier means to control count of the low speed clock to measure the activation timing of the high speed clock generator, based on the frequency deviation estimated by the frequency deviation estimation means. Since the receiver estimates the frequency deviation of the low speed clock by using the multiplied high speed clock, the frequency deviation estimation time is reduced.