发明名称 METHOD AND SYSTEM FOR MEMORY PATROL
摘要 PROBLEM TO BE SOLVED: To reduce an adverse influence on the transfer characteristics of a storage device by setting the patrol unit large, executing a read instruction successively for the inspection of a correctable error, and additionally performing a correcting process which is large in loss in an instruction cycle only when a correctable error has occurred. SOLUTION: When a patrol main control part 1 sends a read instruction and judge that a correctable error has occurred, the patrol main control part 1 sends a correction instruction. Then, a correction instruction generation part 3 puts the values of an address counter 4 back to the head address of a current patrol unit first and then issues a correction request for four (patrol units) while making the address counter 4 count up. The correction instruction is processed in a cycle time as shown by an instruction cycle. Read data are read out of a memory part 6 and corrected by an ECC circuit 7, and further an ECC circuit 8 adds a check bit to generate write data, which are written back to the memory 6 lastly.
申请公布号 JP2000010871(A) 申请公布日期 2000.01.14
申请号 JP19980178836 申请日期 1998.06.25
申请人 NEC KOFU LTD 发明人 NAITO KAZUHIKO
分类号 G06F12/16;(IPC1-7):G06F12/16 主分类号 G06F12/16
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