发明名称 |
METHOD FOR INSPECTING VIA HOLE IN PRINTED WIRING BOARD |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for inspecting a via hole of a printed wiring board that can securely judge the presence or absence of the remainder of an insulation covering and can suppress the occurrence of a faulty part by eliminating the connection failure of the via hole. SOLUTION: In a method for inspecting a via hole 3 of a printed-wiring board 1, the printed-wiring board 1 is manufactured with a method having a process for exposing the surface of a lower-layer conductor 4 by eliminating an insulation layer 2 on the lower-layer conductor 4 for allowing the lower-layer conductor 4 and the upper-layer conductor to conduct electricity by the via hole 3 via the insulation layer 2 of the printed-wiring board 1. In this case, a surface treatment layer 6 is provided on the surface of the lower-layer conductor 4 and at the same time up to the surface treatment layer 6 is eliminated in an insulation layer elimination treatment for forming the via hole 3, thus judging the remainder of the insulation cover 7 according to the state of the surface layer of the lower-layer conductor 4. |
申请公布号 |
JP2000009657(A) |
申请公布日期 |
2000.01.14 |
申请号 |
JP19980179058 |
申请日期 |
1998.06.25 |
申请人 |
MATSUSHITA ELECTRIC WORKS LTD |
发明人 |
YOSHIOKA KOICHI;TATSUTA ATSUSHI;TANAKA KENICHIRO |
分类号 |
G01N21/88;G01N21/956;G03F7/26;H05K3/46;(IPC1-7):G01N21/88 |
主分类号 |
G01N21/88 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|