SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR TESTING IT

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of reducing the number of pins without lowering the rate of failure detection at the time of test or lengthening the test time. SOLUTION: A test mode generating part 2 at least generates a test mode according to input selection from the outside. A control part 3 executes a program for test on the basis of the test mode generated at the test mode generating part 2. A logic operation part 4 generates data for test on the basis of an operation control signal generated by the execution of the above-mentioned program for test by the control part 3. RAM 5 stores the data for test generated by the logic operation part 4 according to the control by the control part 3. A circuit 6 for test derives the above-mentioned data for test read from the RAM 5 to the outside and captures data from the outside after the completion of operation corresponding to the above-mentioned test mode.