发明名称 INPUT BUFFER FROM LOW-OUTPUT TTL TO CMOS
摘要 PROBLEM TO BE SOLVED: To obtain the input buffer from TTL which has small output consumption to CMOS by generating a 2nd output signal which has the same logic state with a TTL signal and matches a CMOS voltage level according to the TTL signal and a 1st output signal. SOLUTION: Transistors(TR) T4 to T6 constitute a pull-down circuit 30. TRs T1 to T3 and T7 form one pull-up circuit and raise the voltage level of an input signal TTLin to a specific CMOS voltage level. The output signal output of the whole circuit is led out of the drain of the TR T2 and reaches a ground level voltage since the TR T7 is ON. Further, the voltage of this output signal output is held through the operation of the TR T1 which is on and the TR T2 which is OFF. Consequently, the consumption of the output can be reduced.
申请公布号 JP2000013214(A) 申请公布日期 2000.01.14
申请号 JP19980165959 申请日期 1998.05.29
申请人 SEKAI SENSHIN SEKITAI DENRO KOFUN YUGENKOSHI 发明人 RYU KANJO;RO YUKAI;KO YOTATSU
分类号 H03K19/0185;(IPC1-7):H03K19/018 主分类号 H03K19/0185
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