| 摘要 |
PROBLEM TO BE SOLVED: To obtain a fabrication method of Bi-CMOS semiconductor device in which ion implantation conditions can be set independently for the emitter region of a vertical PNP bipolar transistor and the source-drain region of a PMOS transistor without requiring additional photoresist processes. SOLUTION: At the same time as the formation of the emitter electrode 20 of an NPN bipolar transistor, a polysilicon layer 12 of a vertical PNP bipolar transistor is etched up to the surface of a semiconductor substrate 1 through an opening 17. Ion implantation is conducted into the surface of the semiconductor substrate 1 exposed by etching to form the emitter region 21 of a vertical PNP bipolar transistor. Subsequently, ions are implanted into the region for forming the source-drain region of a PMOS transistor, thus forming the source- drain region.
|
