发明名称 |
POWER SAVE CIRCUIT FOR OPTICAL RECEIVING CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide an optical receiving circuit that reduces current consumption. SOLUTION: When data transmission is finished and an output signal of a comparator 3 reaches a fixed level, a microcomputer 5 outputs a power save signal. A bias save circuit 6 is operated in response to the power save signal to reduce a bias current. While being a waiting state, a current voltage conversion circuit 1 to the comparator 3 follow a low frequency component according to their characteristics and can detect only presence/absence of an optical reception signal. |
申请公布号 |
JP2000013330(A) |
申请公布日期 |
2000.01.14 |
申请号 |
JP19980172973 |
申请日期 |
1998.06.19 |
申请人 |
SANYO ELECTRIC CO LTD |
发明人 |
SEKIGUCHI SATOSHI;SEYAMA HIROKI |
分类号 |
H04B10/40;H04B10/07;H04B10/11;H04B10/50;H04B10/60;H04B10/69;H04B10/80 |
主分类号 |
H04B10/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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