发明名称 CIRCUIT PATTERN FOR INSULATION METAL SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To realize arrangement technology of a circuit pattern on an insulation metal substrate, capable of magnifying an effective circuit pattern area on the insulation metal substrate. SOLUTION: A main circuit pattern 3 and a dummy pattern 4 surrounding the main pattern 3 are formed on peripheries of a product pattern 2 to be an insulation metal substrate, and the dummy pattern 4 is punched out from the insulation metal substrate with the use of a punching press.
申请公布号 JP2000012987(A) 申请公布日期 2000.01.14
申请号 JP19980180631 申请日期 1998.06.26
申请人 SANYO ELECTRIC CO LTD 发明人 TOYOOKA SHINICHI
分类号 H05K1/02;H05K1/05;H05K3/00;(IPC1-7):H05K1/02 主分类号 H05K1/02
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