发明名称 METHOD OF PLANARIZING INTEGRATED CIRCUITS
摘要 <p>A method is provided for fabricating an integrated circuit. The method includes a variety of steps such as providing a semiconductor substrate having a planar surface. The method includes a first spatially selective partial planarization process and a second material selective planarization process. This provides a substantially planar substrate for shallow trench isolation and interlayer dielectric applications in the manufacture of semiconductor devices or the like.</p>
申请公布号 WO2000002235(A1) 申请公布日期 2000.01.13
申请号 US1999015156 申请日期 1999.07.02
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