发明名称 Layer topology masking technique for photolithography
摘要 On the integrated circuit is deposited an insulation (100) and a conductive (102) layer. On the conductive layer is deposited a photoresist layer (104), on the low region thickly, but thinly on the high region. A photomask (106,108) is used for the photoresist layer to form a photoresist structure. The mask consists of transparent substrate with opaque structures opposite the low region with wider spacing of mask structures than the required conductive structures, while the transparent mask structures have narrower spacing. An Independent claim is also included for the photomask.
申请公布号 DE19930296(A1) 申请公布日期 2000.01.13
申请号 DE1999130296 申请日期 1999.07.01
申请人 SAMSUNG ELECTRONICS CO. LTD., SUWON 发明人 SHIN, JONG-CHAN
分类号 G03F1/14;H01L21/027;H01L21/28;H01L21/3213;H01L21/768 主分类号 G03F1/14
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