Inverse transport processor with memory address circuitry

摘要

The present invention relates to an apparatus in an audio / video signal transport processor for processing signal including time division multiplexed packets of program components with respective packets including a payload of component data and a header with a component identifier. The apparatus includes direct memory access circuits (78 - 98) responsive to detected said identifiers for generating mutually exclusive direct memory access address sequences to write payloads of component data in mutually exclusive blocks of said buffer memory. This invention is used in an inverse transport processor. <IMAGE>