| 摘要 |
A programmable PCM/TDM demultiplexer including an FA function unit including Frame Alignment Logic (FAL) hardware controlled by a Programmable Frame Alignment Controller (PFAC), and accompanied by a DECommutation and dejustification (DEC) function unit including Output Logic Hardware (OLH) controlled by a Programmable Decommutator Sequencer (PDS) controlled in turn by a Programmable Decommutator Sequencer Controller (PDSC).
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