发明名称 Chip package mounting structure for controlling warp of electronic assemblies due to thermal expansion effects
摘要 A chip package is provided for controlling warp of electronic assemblies. The chip package has a first component mounted on one side of a substrate. The substrate is a multi-layered laminate having a plurality of dielectric layers made of an organic material. The first component has a different coefficient of thermal expansion (CTE) than the substrate. The chip package includes a second component mounted on an opposite side of the substrate in a location substantially opposite the first component. The second component has a CTE that approximately matches the CTE of the first component. The second component tends to generate bending moments that offset distorting bending moments that may otherwise exist in the chip package without the second component.
申请公布号 US6014317(A) 申请公布日期 2000.01.11
申请号 US19980040847 申请日期 1998.03.18
申请人 W. L. GORE & ASSOCIATES, INC. 发明人 SYLVESTER, MARK F.
分类号 H01L23/373;H01L23/498;H05K1/02;H05K1/18;(IPC1-7):H05K7/02 主分类号 H01L23/373
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