发明名称 Method of manufacturing a split-gate flash memory cell
摘要 In a method of manufacturing a split-gate flash memory cell including source and drain diffusion regions (6 and 9), a floating gate insulation film (2), a floating gate electrode (3), a control gate insulation film (4), and a control gate electrode (10), the method includes the steps of: successively forming the floating gate insulation film (2) and the floating gate electrode (3) on a selected area of a semiconductor substrate (1); forming the control gate insulation film (4) on the floating gate electrode (3) and on a remaining area of the semiconductor substrate (1), the control gate insulation film (4) having a side wall part brought into contact with a side wall of the floating gate electrode (3); carrying out ion-implantation of a first dopant to form the source diffusion region (6) on a first part of the remaining area of the semiconductor substrate (1); forming a sidewall electrode (8) brought into contact with the sidewall part of the control gate insulation film (4); carrying out ion-implantation of a second dopant to form, on a second part of the remaining area of the semiconductor substrate (1), the drain diffusion region (9) self-aligned with respect to the sidewall electrode (8); and forming the control gate electrode (10) on the control gate insulation film (4) and on the sidewall electrode (8).
申请公布号 US6013552(A) 申请公布日期 2000.01.11
申请号 US19980090227 申请日期 1998.06.04
申请人 NEC CORPORATION 发明人 OYAMA, KENICHI
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/301;H01L21/46;H01L21/78 主分类号 H01L21/8247
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