发明名称 METHOD FOR PACKAGING WIRING BOARD, ELECTRONIC UNIT AND ELECTRONIC COMPONENT
摘要 PROBLEM TO BE SOLVED: To provide a method for packaging a wiring board, an electronic unit and electronic components which does not cause lowering of soldering strength and can prevent electronic components from deteriorating in function and in the quality of soldering, when the electronic components are packaged. SOLUTION: A wiring board 1 includes a board base B, a plurality of electrode pads P1, P2, P3 placed on the same packaging surface Bb of the board base B, and two or more kinds of solders S1, S2, S3 whose melting point are different from each other and which are placed on the electrode pads P1, P2, P3. This electronic unit 10 is made by connecting electrodes C1a, C2a, C3a of electronic components C1, C2, C3 to the electrode pads P1, P2, P3 respectively in a batch operation of reflow-soldering. A method for packaging electronic components includes the steps of constituting the wiring board 1 described above, mounting electronic components C1, C2, C3 on the wiring board 1 at predetermined positions, and connecting the electrodes C1a, C2a, C3a of the electronic components C1, C2, C3 to the electrode pads P1, P2, P3 through a batch operation of reflow-soldering to package the electronic components C1, C2, C3 on the wiring board 1.
申请公布号 JP2000004077(A) 申请公布日期 2000.01.07
申请号 JP19980165361 申请日期 1998.06.12
申请人 TOSHIBA CORP 发明人 NAKAJIMA HAJIME
分类号 B23K1/00;H05K3/34;(IPC1-7):H05K3/34 主分类号 B23K1/00
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