发明名称 METHOD AND DEVICE FOR CORRECTION AND INSPECTION
摘要 PROBLEM TO BE SOLVED: To shorten the time needed for a correcting and inspecting process for checking the result of an error correcting process for correcting a direction different from the input direction of data when an error inspection code is calculated. SOLUTION: A syndrome generating circuit 41 of a PO error correction part 40 stores the position of a calculated error data and its correction value in a memory 46. A sorting circuit 43 sorts correction values stored in the memory 46 in the read direction of user data according to the position of the error data and outputs them to a CRC arithmetic circuit 44. The CRC arithmetic circuit 44 performs CRC operation for the correction values in the same PI direction with the input order of the user data. This operation direction matches the read direction of the user data when an error inspection code EDC is calculated. An EOR circuit 45 compares the operation result of the CRC operation with 1st decision data as the result of a CRC check in the PI error correction and stores 2nd decision data for a CRC check in the PO error correction in a memory 47.
申请公布号 JP2000004170(A) 申请公布日期 2000.01.07
申请号 JP19980234230 申请日期 1998.08.20
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 HORIBE YASUSHI
分类号 G11B20/18;H03M13/00;H03M13/09;H03M13/15;H03M13/29;(IPC1-7):H03M13/00 主分类号 G11B20/18
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