发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent the destruction of an output-use transistor at the time of high power source voltage without increasing the number of output-use transistors for outputting output voltage in accordance with signal voltage supplied to a gate. SOLUTION: This integrated circuit device is provided with a boosting circuit 12 constituted of an output-use transistor Q1 for outputting output voltage in accordance with signal voltage OUTT supplied to a gate, a pumping capacitor C1 and a delay circuit DL1 for supplying the voltage of power source voltage VCC or above to the gate of the transistor Q1 by superimposing boosting voltage on the signal voltage. In this case the device is provided with a voltage detecting circuit 21 constituted of voltage dividing resistors R1, R2 for detecting the voltage of power source voltage VCC, the reference voltage VREF and a comparator CM1. By the boosting circuit 12, the destruction of the transistor Q1 can be prevented by stopping the superimposing of charging voltage of the capacitor C1 for signal voltage OUTT to be supplied to the gate of the transistor Q1 by the pumping capacitor C1.
申请公布号 JP2000003591(A) 申请公布日期 2000.01.07
申请号 JP19980164753 申请日期 1998.06.12
申请人 NEC CORP 发明人 OHASHI MASAYUKI
分类号 G11C11/413;G11C11/407;G11C11/409;G11C29/00;G11C29/06;H03K19/0175;(IPC1-7):G11C11/409;H03K19/017 主分类号 G11C11/413
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