| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the circuit scale required to decode digital image data and to decrease a memory capacity required to decode high precision digital broadcast signals. SOLUTION: Received coded image data ES are stored in a memory 2 via an input buffer 3 and then read and fed to a variable length decoding circuit 4, an inverse quantization circuit 5, an inverse cosine transform circuit 6 and an adder 7, where the data are decoded. The decoded image data are given to a horizontal direction reduction circuit 8, in which the number of pixels in the horizontal direction for each macro block is reduced. I, P frames being a reference picture are stored in storage areas 2b, 2c of the memory 2 respectively and a B frame is given to a vertical direction reduction circuit 9, where the number of pixels of the frame in the vertical direction is decreased and the resulting frame is stored in a storage area 2d of the memory 2. The image data of the I, P frames read from the storage areas 2b, 2c are given to a horizontal direction magnification circuit 13, where the pixels in the horizontal direction are interpolated and the resulting data are fed to the adder 7 as the reference picture via a motion compensation circuit 14.</p> |
