发明名称 METHOD AND APPARATUS FOR D.C. OFFSET CORRECTION IN DIGITAL-TO-ANALOG CONVERTERS
摘要 A method and apparatus for adaptively correcting D.C. offset errors imposed upon signals in a communication device. The invention includes a feedback loop correction circuit (122) and method for measuring and reducing D.C. offset errors imposed upon analog transmission signals by transmit digital-to-analog converters (DACs) (102) and associated analog reconstruction filters. A digital feedback loop is used to remove D.C. offset errors from the analog transmission signals prior to transmission. In one embodiment, the digital feedback loop includes a pair of analog-to-digital converters, a digital D.C. offset correction circuit (222), and a pair of adders (228, 230). The transmission signals are digitized, filtered, and digitally processsed by correction circuit (222) to generate offset correction signals that are equal to undesired D.C. offset error present in the transmission signals. The correction signals are added to digital input baseband signals thereby removing undesirable D.C. offset errors from transmission signals.
申请公布号 WO0001073(A1) 申请公布日期 2000.01.06
申请号 WO1999US14656 申请日期 1999.06.29
申请人 QUALCOMM INCORPORATED 发明人 WALKER, BRETT, CHRISTOPHER
分类号 H03M1/10;H03C3/40;H03M1/06;H03M1/66;H04L27/00 主分类号 H03M1/10
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