| 摘要 |
A Built-In Self Test (720) generates a BIST FAIL signal when a failure is detected at a specific address within a memory array (110). The address associated with the failure is stored in a latch (210). During normal operation, the address stored in latch (210) is compared to addresses being currently accesses. A HIT signal is generated when a match occurs. The HIT signal disables selection of the defective row in array (110). A redundant row select signal selects the redundant row (112) to replace the defective row.
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