发明名称 Methods for making shallow trench capacitive structures
摘要 Disclosed is a capacitive structure and method for making the capacitive structure for suppressing inductive noise produced by high performance device power supplies. The capacitive structure includes a trench having a bottom surface and respective walls that are integral with the bottom surface. The trench is defined in a semiconductor substrate and is configured to isolate at least one transistor active area from another transistor active area. The structure further includes an oxide layer that is defined along the bottom surface and the respective walls of the trench, such that a channel is defined within the trench between the oxide layer that is defined along the bottom surface and the respective walls. The structure also includes a conductive polysilicon layer that is defined within the channel and is within the trench. The conductive polysilicon layer defines a conductive electrode that is separated from the semiconductor substrate by a thickness of the oxide layer.
申请公布号 US6010939(A) 申请公布日期 2000.01.04
申请号 US19980052865 申请日期 1998.03.31
申请人 VLSI TECHNOLOGY, INC. 发明人 BOTHRA, SUBHAS
分类号 H01L21/762;H01L21/763;(IPC1-7):H01L21/20 主分类号 H01L21/762
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