发明名称 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
摘要 A non-volatile electrically erasable programmable read only memory (EEPROM) capable of storing two bit of information having a nonconducting charge trapping dielectric, such as silicon nitride, sandwiched between two silicon dioxide layers acting as electrical insulators is disclosed. The invention includes a method of programming, reading and erasing the two bit EEPROM device. The nonconducting dielectric layer functions as an electrical charge trapping medium. A conducting gate layer is placed over the upper silicon dioxide layer. A left and a right bit are stored in physically different areas of the charge trapping layer, near left and right regions of the memory cell, respectively.
申请公布号 US6011725(A) 申请公布日期 2000.01.04
申请号 US19990246183 申请日期 1999.02.04
申请人 发明人
分类号 H01L21/8247;G11C11/56;G11C16/04;G11C16/10;G11C16/14;G11C16/26;H01L27/105;H01L29/788;H01L29/792;(IPC1-7):G11C16/04 主分类号 H01L21/8247
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