发明名称 DIVISION AND/OR EXTRACTION OF SQUARE ROOT ARITHMETIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To make an iterative division and/or iterative extraction of square root arithmetic circuit fast by selecting a subset of quotient digit values in advance and shortening a calculation time which passes through the critical of operation. SOLUTION: A dividend A is divided by a divisor D to generate a quotient Q. An iterative dividing circuit 20 calculates a partial residue represented as Pj+1 =rPj -qj+1 D first in each iterative calculation. Here, Pj+j is a partial residue after j+1 iteration, (r) a base, Pj a partial residue after (j) iteration, qj+1 a quotient digit depending upon Pj and D, and a Pj a dividend A when j=0. Then a primary quotient digit selecting circuit selects and stores a subset of quotient digits qj+1 which depend upon D and do not depend upon Pj . Then a secondary quotient digit selecting circuit operates to select a quotient digit qj+1 to be used by the iterative dividing circuit 20 from the stored subset of quotient digits qj+1 which depends upon Pj and do not depend upon D.
申请公布号 JPH11353158(A) 申请公布日期 1999.12.24
申请号 JP19990120569 申请日期 1999.04.27
申请人 ARM LTD 发明人 DAVID TERRENCE MATHENY
分类号 G06F7/52;G06F7/483;G06F7/49;G06F7/535;G06F7/552 主分类号 G06F7/52
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