发明名称 INPUT/OUTPUT TIMING-CONTROLLED INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To make performable a precise delay control operation without using many external input terminals in order to decide the delay amount in an input/ output timing-controlled integrated circuit. SOLUTION: A signal which is used to decide the delay amount is controlled by a memory element 3 and a memory element 9. The memory elements 3, 9 for timing control are constituted of a shift register, and they are controlled by an external terminal 1 and an external terminal 2. In addition, in order to eliminate an irregularity in a wiring delay between a delay element 5 and a delay element 10, the delay elements 5, 10 are built in an input/output cell.</p>
申请公布号 JPH11353873(A) 申请公布日期 1999.12.24
申请号 JP19980154190 申请日期 1998.06.03
申请人 MITSUBISHI ELECTRIC CORP 发明人 SAKAI HIROAKI
分类号 G11C11/417;G06F1/10;G11C11/401;G11C11/407;(IPC1-7):G11C11/407 主分类号 G11C11/417
代理机构 代理人
主权项
地址