CIRCUIT AND METHOD FOR FRAME SYNCHRONIZATION ON RADIO LINE

摘要

PROBLEM TO BE SOLVED: To make jitter performance satisfactory even when plural link connections are performed by generating a frame synchronizing signal with communication data of a cycle shorter than a prescribed cycle as a synchronous source among communication under reception at present when slots simultaneous ly receive plural kinds of communication data of different cycles. SOLUTION: A CRC discriminating part 17 discriminates the presence/absence of data error in reception data to be received for each slot. Further, a reception field strength detecting part 18 detects the field strength of reception data for each slot and outputs the field strength detecting signal. A synchronous slot selection control part 19 supplies a slot selection signal for selecting a unique word detecting signal with the best slot as a synchronizing object to a slot selecting part 21 out of plural slots based on the discriminated result of the CRC discriminating part 17 and the field strength detecting signal and supplies slot number information corresponding to this selected synchronizing object slot to a frequency divider 23.