发明名称 |
SEMICONDUCTOR CHIP PACKAGE AND ITS MANUFACTURE |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor chip package having the structure of a chip scale package and a manufacture method through the use of the raw material and the auxiliary material of the typical semiconductor chip package whose manufacturing cost is reduced and whose manufacturing process is simplified. SOLUTION: A frame to which a conductive plate material is adhered to the base of an insulating plate material 11 where through holes 12 are formed is prepared. A semiconductor chip 1 is fixed onto the insulating plate material 11. The chip is electrically connected to the conductive plate material of an area exposed into the through hole 12 by a bonding wire 5 or a bump. The semiconductor chip 1 is sealed by a sealing body 7, the conductive plate material is selectively etched, and it is formed as a conductive pattern for lead. |
申请公布号 |
JPH11354572(A) |
申请公布日期 |
1999.12.24 |
申请号 |
JP19990130074 |
申请日期 |
1999.05.11 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
KIN SAIKO;SUNG SI CHAN |
分类号 |
H01L23/12;H01L21/56;H01L21/60;H01L23/31;H01L23/498 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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