| 摘要 |
PROBLEM TO BE SOLVED: To provide a MIS transistor where a short-channel effect is suppressed without increasing a threshold voltage. SOLUTION: N-type source 2 and drain 3 are formed separately on the upper surface of a P-type semiconductor substrate, and a side wall 6 consisting of an insulator surrounds a gate electrode 4. A P-type channel dope layer 9 that is doped to 1×10<18> cm<-3> or more is provided between the source 2 and the drain 3. An N-type counter dope layer 8 is provided on the upper surface of a semiconductor substrate 1 that is sandwiched between the source 2 and the drain 3 for compensating for the boron concentration of the channel dope layer 9. A pocket region 10 with a low impurity concentration is provided between the N-type counter dope layer 8 and the source 2, and between the layer 8 and the drain 3. In the pocket region 10, an N-type impurity is compensated for by a P-type impurity.
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