| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can relax clock skew, even inside a circuit block, at a terminal side of a clock transmission system. SOLUTION: The laying of clock wirings L11 to L14 for outputting from a clock buffer is made the same as other circuit blocks mutually to each of a plurality of circuit blocks 2, where a specified circuit 5 operated on input of a clock signal distributed from a clock buffer AMP4 is arranged. Therefore, circuit blocks differ slightly in load driven by each circuit block and clock skew is thereby made small.</p> |
