HIGH SPEED, INCREASED BANDWIDTH CAMERA

摘要

Many improvements for a high speed camera including being able to process image data from a CCD array (12) at one-quarter the pixel rate at which that image is provided by the CCD array (12); automatically demultiplexing color information in the digital domain; a phase shift clock circuit (26') to individually adjust the phase of the clock signal to each A/D converter; high frequency, high power analog, bipolar clock drivers to drive the horizontal functions of the CCD array (12); a technique to minimize the smearing of partial values of previous pixels into later pixels since the CCD array (12) is being clocked faster than the internal time constant of the output stage of the CCD array (12); determination of, and compensation for, the dark reference offset the pixel data streams from the CCD array (12); substracting the dark reference offset from the data pixel signal stream from the CCD array (12) to stabilize the operating point of the output amplifier following the CCD array (12).