发明名称 Voltage surge suppression circuit for transistors with isolated gates
摘要 Voltage surge suppression circuit for transistors has Zener diode for causing a breakdown depending on the surge voltage applied to transistor load connection with a further Zener diode to clamp/hold the gate voltage against the first Zener diode breakdown. The circuit has a first Zener diode (55) with one end connected to an electrical load (51) and the transistor's high or low voltage connection and its other end connected to the transistor's gate connection to cause a breakdown depending on a surge voltage applied to the transistor connection to the load. A resistance (54) between the gate connection and a gate control unit (53) prevents current from flowing from the high or low connection to the gate control unit if the Zener diode breaks down. A second Zener diode (56) with several stages is connected between the other transistor connection and the its gate to clamp or hold a gate voltage against breakdown of the first Zener diode. The second Zener diode has a lower breakdown voltage than the transistor's gate standing voltage.
申请公布号 DE19927727(A1) 申请公布日期 1999.12.23
申请号 DE1999127727 申请日期 1999.06.17
申请人 DENSO CORP., KARIYA 发明人 KOUNO, KENJI
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L27/06;H01L27/088;H01L29/10;H01L29/78;H03K17/0812;H03K17/082;(IPC1-7):H01L23/62 主分类号 H01L27/04
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