摘要 |
<p>An integrated circuit chip interconnect wiring level and method of making is described incorporating an adhesion layer M of Ti, Zr, Hf, V, Nb, Ta, W and alloys thereof and a layer of Al-rare-earth or Al-Y alloy. The layers may be heat treated to become one layer. A further layer of AlCu, AlCuSi or AlCuGe alloy may be added and heat treated to form one layer with the layers below. The problems of polishing MAl3 or other M aluminides by reducing their formation, of scratching by reducing the size of the polishing debris, and of Cu plate out during polishing are overcome. <IMAGE></p> |