摘要 |
A time-shared multitask execution circuit for sharing registered digital hardware among a plurality of users is provided to achieve zero overhead switching while processing as few as 1 sample (in one clock cycle) for each user. The circuit comprises a three register bank, two switches, and a dual port RAM. On any given cycle of the clock, one register is processing data of a current user, one register is writing processed data of a prior user to the RAM, and one register is reading data of a subsequent user for processing from RAM. In this manner, processing, reading and writing are decoupled and proceed in parallel.
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