发明名称 Method and architecture for non-sequentially programming one-time programmable memory technology without initially erasing the memory
摘要 The present invention provides a method and architecture for allowing a device using a traditional one-time programmable technology to be programmed multiple times within the package. The present invention provides multiple programming without introducing the additional complexity of external pins or specialized packaging. An address counter and main array is provided using one-time programmable technology. The address counter selects a page in the main array to write the programmable information. The desired programming information is programmed into a first page while the additional pages remain unprogrammed. When additional information needs to be configured, the address counter is incremented and points to a new page in the main array where the new programming information may be stored. As a result, a number of programming configurations can be programmed into a one-time programmable technology. The advantages of erasable technology may be implemented using the simplicity of one-time programmable technology.
申请公布号 US6006305(A) 申请公布日期 1999.12.21
申请号 US19960730824 申请日期 1996.10.17
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 FOX, J. KEN
分类号 G11C16/10;G11C17/18;(IPC1-7):G06F12/00 主分类号 G11C16/10
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